In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve the high densities there have been, and continue to be, efforts toward scaling down device dimensions (e.g., at sub-micron levels) on semiconductor wafers. In order to accomplish such high device packing densities, smaller feature sizes and more precise feature shapes are required. This may include the width, thickness and spacing of interconnecting lines, spacing and diameter of contact holes, and the surface geometry, such as corners and edges, of various features.
The requirement of small features with close spacing between adjacent features requires sophisticated manufacturing techniques to ensure that quality and operability of the features are not compromised for the purpose of reducing feature size. Among the many aspects related to improving semiconductor fabrication processing to achieve higher density devices, the ability to form thin film layers, which are substantially free from impurities and defects, remains critical to the structural integrity of smaller features as well as to the performance of the device with respect to increasing the speed of the device. Even minor impurities or defects present on the thin film layer tend to result in poor device characteristics, thereby reducing the effectiveness of the semiconductor device.
Thus, an efficient method to form a thin film is desired to increase productivity, quality, and reliability in IC manufacture.